With the development of Internet-of-Things, the demand for low-power radios and low-power sensors has been growing rapidly in the past decade. The Analog-to-Digital Converter (ADC) is one of the key building blocks in these systems to digitize information from the analog or RF domAIn to the digital domain. In this tutorial, an overview of low-power ADC architectures is given first, where the strong and weak points of each architecture are described, and limitations are investigated. Besides conventional architectures, several new developments like hybrid converters and noise-shaping SAR ADCs are introduced as well. After this overview, the talk will focus on low-power SAR ADCs, and the limits of power consumption, resolution, speed, and chip-area will be studied. Various concrete design examples from literature will be discussed in more detail to show some of the latest techniques that enable very low-power ADCs with state-of-the-art performance.

随着物联网的发展，对低功率无线电和低功率传感器的需求在过去十年中迅速增长。模数转换器（ADC）是这些系统中将信息从模拟或RF域数字化到数字域的关键组成部分之一。在本教程中，首先给出了低功耗ADC架构的概述，其中描述了每种架构的优缺点，并研究了其局限性。除了传统的体系结构，还引入了一些新的发展，例如混合转换器和噪声整形SAR ADC。在此概述之后，演讲将集中在低功耗SAR ADC上，并将研究功耗，分辨率，速度和芯片面积的限制。将更详细地讨论文献中的各种具体设计示例，以展示一些使具有最新性能的超低功耗ADC成为可能的最新技术。